Software Defined Vehicle

Cadence & Arm partner for SDV chiplet innovation

SAN JOSE, Calif.— Cadence Design Systems Inc., a company that creates software tools for designing complex chips and the systems they connect into, used in everything from smartphones to cars, announced a collaboration with Arm, a company that designs the brains of many of our digital devices, licensing chip technology for efficient performance in everything from smartphones to supercomputers, to deliver a chiplet-based reference design and software development platform to accelerate software-defined vehicle (SDV) innovation. The automotive reference design, initially for advanced driver assistance system (ADAS) applications, specifies a scalable chiplet architecture and interface interoperability to foster industry-wide collaboration, enable heterogeneous integration and expand system innovation.

The solution is architected and built using the latest generation of Arm® Automotive Enhanced technologies and Cadence® IP. The complementary software stack development platform is provided as a digital twin of the hardware. It is compliant with the Scalable Open Architecture for Embedded Edge (SOAFEE) initiative software standard, enabling software development to begin before hardware is available and allowing subsequent system integration validation. The combined solution speeds both hardware and software development, accelerating time-to-market.

The growing prevalence of ADAS and SDVs is driving the need for more complex AI and software capabilities. This demand also necessitates greater levels of interoperability and collaboration in the automotive electronics ecosystem. Chiplets offer an increasingly attractive solution, rapidly customizing 3D-IC systems for diverse automotive needs. However, it’s crucial that chiplets from different IP providers work together seamlessly. In addition, the rapid pace of automotive development necessitates that 3D-IC system developers have a software development platform. This platform allows them to shift left in the process flow while the IP and chiplets are still being designed.

The new solution architecture and reference design provide a standard for chiplet interface interoperability, addressing a critical industry need. The Cadence components of the solution include:

  • Helium™ Virtual and Hybrid Studio enables rapid creation of virtual and hybrid platforms. Helium Software Digital Twin supports deployment at scale for software developers.
  • Industry leaders use I/O IP solutions for top-notch interface and memory protocols, including UCIe™, facilitating swift chiplet-to-chiplet communication.
  • Comprehensive compute IP portfolio including advanced AI solution, the Neo neural processing unit (NPU) IP, the NeuroWeave software development kit (SDK) for machine learning (ML) solutions, and world-class DSP compute solutions

“The automotive industry is evolving rapidly and AI and software advancements are emphasizing a greater need to speed up development cycles,” said Dipti Vachani, senior vice president and general manager, Automotive Line of Business, Arm. “We’re enabling faster software and hardware development. This is achieved by bringing together a complete solution of design and verification technologies underpinned by the latest Automotive Enhanced technologies from Arm. This collaboration allows developers to start building for next-generation SDVs well before silicon is available in the market. Together with critical ecosystem partners like Cadence, we’re making this possible.”

“Reducing the overall system design workload is crucial to meet shrinking time-to-market windows. Shifting hardware and software development left are also essential in developing today’s increasingly complex SDVs. Automotive 3D-IC SoC developers rely on virtual platforms and chiplets as key enablers,” said Paul Cunningham, senior vice president and general manager of the System Verification Group at Cadence. “We are working closely with Arm to address key inefficiencies in both software and hardware development and verification processes. Additionally, we are catalyzing the multi-die chiplet ecosystem for automotive semiconductors.”

The virtual platform and component IP for the reference platform are available now for early adopters. 

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