Emerging Technologies

Marvell unveils 200G interconnect tech at 2023 OCP summit

SANTA CLARA, Calif.— October 16, 2023— Marvell Technology, Inc. (NASDAQ: MRVL) will demonstrate 200 Gbps-per-lane electrical I/O at this year’s OCP Global Summit. The demonstration showcases technology that serves as a critical building block for 200G/lane active electrical cables (AEC), laying the foundation for next-generation AI clusters and cloud infrastructure.

The demonstration will involve driving 200 Gbps per lane over electrical channels. Underpinning the demonstration is Marvell 224G long-reach SerDes technology, capable of driving 40dB+ of insertion loss at 224G/lane. At the summit, Microsoft will conduct a similar technology demonstration optimized for a Microsoft-specific copper-channel use case.

High-speed SerDes technology is a key intellectual property foundation of Marvell’s industry-leading data infrastructure platform. This platform also includes encryption engines, system-on-chip fabrics, chip-to-chip interconnects, and physical layer interfaces. Furthermore, the platform designs semiconductors, processor subsystems, and chiplets optimized for different use cases, customers, and applications. Marvell’s technology offers a comprehensive solution that caters to diverse industry needs and facilitates efficient data processing and transmission. Moreover, Marvell 5nm 224G long-reach SerDes technology, with its 40dB+ reach capability at 224G/lane signaling, enables the development of a range of components. Additionally, the next generation of cloud infrastructure requires these components to have 200G electrical I/O to meet performance demands.

“Marvell is continuing its SerDes leadership in 200G. It is addressing the accelerating bandwidth requirements of AI and other complex workloads,” said Achyut Shah, senior vice president and GM, Connectivity Business Unit, at Marvell. “We are pleased to be demonstrating our leading offerings at OCP. We are pleased for the technology to be showcased in Microsoft’s booth.”

The design of integrated circuits for high-speed communications employs a functional block called a SerDes, or serializer/deserializer. A SerDes block converts data from parallel interfaces, such as the I/O of a switch ASIC, to a serial interface. This enabls the exchange of data between devices over copper or fiber connections. Moreover, different SerDes blocks optimize for different distances, using long-reach SerDes to enable connections over physical interconnects between systems (meters) and using short-reach or extra-short-reach SerDes to connect die within a system-on-a-chip.

Marvell incorporates its SerDes, along with interconnect technologies, into its flagship silicon solutions including Teralynx®switchesPAM4 and coherent DSPsAlaska® Active Electrical Cable (AEC) retimers and Ethernet physical layer (PHY) devices, OCTEON®processorsBravera™ storage controllersBrightlane™ automotive Ethernet chipsets, and custom ASICs.

The 2023 OCP Global Summit is taking place October 17-19 at the San Jose Convention Center. Visit Marvell in booth B13 and Microsoft in booth B7.

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